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zapped- 06-28-2007
compiler stupidy or not?
CLR R0 AND R1 ; compiler stupidity? seems 0 & anything is zero ..... and .... CLR R1 OR R1 ;more stupidity? because anything | zero remains it's original value

sailpix- 06-28-2007

Perhaps compiler stupidity. But, maybe not. The obvious goal is to clear both registers. Perhaps the AND instruction uses fewer cycles than another CLR instruction.

zapped- 06-28-2007

in the first example, R0 is already zero and according to the README on the v8 uRisc, AND R1 just affects R0AND R0-R7 | R0=R0&R# Seems to me that if R0 is zero then it can't be affected by an AND. Granted, after ANDing, they do set R1 equal to R0, but seems they could have skipped the AND What do you think about the second example does not X | zero = X?

radarman- 06-28-2007

There is no CLR instruction (technically), it is an alias for XOR R0. (CLR R0 essentially performs R0 XOR R0). I'm not sure what would happen if you attempted CLR R1, though I suspect that it would do R0 XOR R1, if it let you do it at all. Remember, the v8 has a single accumulator, R0. The other registers can only be source registers.

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