Need help with pv2ass
This is primarily directed at BillW - but I figured others might be able to use the answer as well. I want to modify pv2ass to support the for new instructions I added to my v8 processor core. I have tried to follow the template in opcodes_v8urisc.c, and added new opcode definitions for my BRX, MUL, SMSK, and GMSK instructions. All of these are immediate instructions, and require no additional operands - which means they will be "NOP"'s on the PV2 variant of the processor. What else do I need to do to get the assembler to recognize my new instructions? Thanks!

Not much else is required. Go into the opcode_table_generator directory and run "make.bat" (or just "make", depending on your tendencies) and run the "gen" utility it creates. This will build the other opcode table in the parent directory. After that just rebuild your pv2 ass, and it will have the new opcodes inserted in it.

Not to distract but is it really PV2ass? Didn't know they had asses.

It really is pv2ass. Unfortunately I was never able to create a 3 assed pv.

I have a hard time believing there are South Park fans so dedicated to the show that they put that much effort into a wiki... Oh well, to each, their own I suppose. As for pv2ass, I believe I have modified it with the new instructions. I haven't had a chance to try them out, though. Step one is to write a bootloader similar to the one on the pv2. This will allow debugging to occur much more quickly, as I would otherwise have to rebuild the whole bleeding FPGA everytime I found a bug in the assembly. The plan is to write a simple program that will read the main program over the serial port, stuff it into an appropriate segment of RAM, and then transfer control to it much like the PV2 does. I also found ROMGEN on the http://www.fpgaarcade.com site. (Look in the Space Invaders game.)

Ok, I have another question about pv2ass - or, more to the point, open8as - since I've decided to name my new processor core the "Open8" My new core is no longer limited to the bank structures on the pv2, though I would like to leave a command line option to check for them. Instead, my new processor has 32kB of SRAM, and presently an 8kB boot ROM. I would like to be able to disable the "bank" checks, so that I can actually target code to memory above 7FFF. I'll probably re-edit when I figure it out - I've already edited it once, since I successfully implemented the DBNZ instruction (implemented as DBNZ Rn,<label>) Any pointers? Thanks!